IBM Provides a Power11 Update
Rob McNelly shares what piques his interest about the new processor
With the holiday season upon us, it’s that time of year where I ask myself, “Where did the time go?” While Thanksgiving has already passed, I am—as always—thankful for the readers who take the time to read the things that I write.
Power11 and the Next Generation of AI
If you haven’t heard, Power11 will arrive in 2025:
“Given the rate and pace of AI adoption, the influx of data associated with AI will fuel tremendous business innovations, but requires strategic considerations on where data resides, compute capacity, and necessary security and compliance controls.
“This is why understanding the uniqueness of your IT processes, workloads and applications demands a workload placement strategy based on key factors such as the type of data, necessary compute capacity and performance needed and meeting your regulatory security and compliance requirements.”
Of course, what always piques my interest is any discussion around upcoming processor technologies:
“With a planned release in 2025, the next generation IBM Power11 system will have innovations in the processor, system, and stack levels to help enterprises propel digital transformation initiatives for their mission-critical infrastructure. IBM Power also continues to support emerging enterprise AI use cases with the MMA (Matrix-Math Assist) architecture.
“The Power11 processor is designed to deliver higher clock speeds and can add up to 25% more cores per processor chip than comparable IBM Power10 systems. The Power11 processor builds upon the key capabilities we delivered with Power10 including stronger reliability, availability, and serviceability (RAS) characteristics, better energy efficiency and energy management, and improved quantum-safe security.”
Bill Starke, IBM’s lead Power Processor Architect and Distinguished Engineer, provides this breakdown of the new processor:
“Beyond the processor itself, we are introducing the following improvements to packaging, memory architecture and AI acceleration:
“Packaging Innovation: The Power11 processor will leverage new integrated stack capacitor (ISC) technology and advanced 2.5D packaging along with innovations in cooling such as improved heatsinks and more efficient fans to optimize energy delivery, improve thread and core strength and increase system capacity.
“Enhanced System Architecture: The robust memory architecture for Power11 systems will be based on the recently released DDR5 DDIMMs and enhanced OMI interfaces which enable improved memory reliability, capacity, and bandwidth. Given that OMI is technology agnostic, the Power11 portfolio built on the Power11 processor will also support OMI DDR4 memory migrated from Power10 high-end systems, enabling clients to protect their investments in memory technology.
“AI Acceleration: We continue to support a range of emerging enterprise AI use cases with the MMA architecture. Improvements to Power11 processor core strength and system capacity will improve the performance of the MMA for inferencing workloads. Furthermore, IBM intends to incorporate the IBM Spyre accelerator into Power11 offerings to provide additional AI inferencing capabilities. Working together, IBM Power processors and the IBM Spyre accelerator will enable the next generation infrastructure to scale demanding AI workloads for businesses.
“What’s ahead for IBM Power: As the physics constraints of Moore’s Law start to limit semiconductor technology improvements, we see the industry begin to replace traditional designs with new packaging technologies to augment their processor and accelerator architectures. Ranging from chiplet-based approaches to 3D chip stacking architectures, these technologies show some promise of helping the industry move forward.
“Due to IBM’s premier signaling technology and packaging advantages, using a chiplet-based design for Power will provide substantially greater value than that enjoyed by the best-of-breed in the industry: the means to grow effective silicon content per socket, while controlling costs and managing energy and cooling. We also discovered that a chiplet-based design will enable improved system topologies, paving the way for continued improvements in large system scaling for multiple generations to come. “Power systems will migrate to a chiplet-based architecture after Power11 which will provide a strong foundation for multiple future generations of Power. Looking beyond Power11, the strengths of Power are well-aligned with future technology trends and leverage the innovative research and development within IBM.”
Potential NPIV, SMB issues
This IBM Support notification summarizes potential issues with NPIV:
“Abstract: Potential undetected data loss can occur on LPARs using NPIV with certain Fibre Channel adapters
Description: Potential undetected data loss can occur on LPARs using NPIV over Fibre Channel adapters with the following Feature Codes:
EN1E/EN1F, EN1G/EN1H, EN1J/EN1K, EN2L/EN2M, and EN2N/EN2P”
Also from IBM Support, this covers potential issues running the server message block (SMB) file system:
“Abstract: Potential undetected data loss can occur when copying or writing to files on an SMB share using the AIX SMB Client
Description: Potential undetected data loss can occur when copying or writing to files on an SMB share using the AIX SMB Client. This can only occur when oplocks and file leasing are enabled in the AIX SMB Client and the SMB server returns an asynchronous STATUS_PENDING response to the AIX SMB Client during the file copy. Data loss can occur even though the copy operation does not return an error.”
This is a reminder that you always want to change default credentials, but in some cases, to do so, you have to update your system firmware:
“DESCRIPTION: IBM Flexible Service Processor (FSP) has static credentials which may allow network users to gain service privileges to the FSP.
“…For Power10 servers, only FW1030, FW1050 and FW1060 are supported but all prior firmware releases on the listed products are vulnerable.
“For Power9 servers, only FW950 is supported but all prior firmware releases on the listed products are vulnerable.
“For Power8 servers, a mitigation is being released only for FW860 but all prior firmware releases on the listed products are vulnerable.
“Remediation/Fixes: IBM strongly recommends customers with the products below install FW1030.62(1030_082), FW1050.22(1050_063), FW1060.11(1060_065) or newer to remediate this vulnerability as soon as possible.”
SEA Simplification
This is hardly a new development, and I may have mentioned it previously. But reminders never hurt, especially for those who are stuck in their ways:
“The SEA simplification feature allows [shared Ethernet adapters] SEA to configure in High Availability (HA) without a dedicated control channel adapter. When configuring SEA in HA mode with a control channel adapter, mistakes can be made by mismatching the control channel adapter or by adding a vlan that is already added on a Virtual Ethernet Adapter. These mistakes can cause network outages. This feature avoids these mistakes by matching partners using a dedicated management vlan 4095, which the user cannot configure. The vlan 4095 is not user configurable. The hypervisor activates it during the SEA HA configuration phase. The SEA HA partners are identified by matching their PVID (Port VLAN ID). The SEA HA configuration uses a broadcast-based discovery protocol to identify the HA partner. After the partner is identified, the discovery heartbeat is exchanged in addition to the control channel heartbeat to monitor the partner’s existence.
“This feature is available for both failover and sharing modes. The option to configure SEA in HA mode with a dedicated control channel adapter remains available.”